Case study

VerilogBoy: reconstructing Game Boy hardware in Verilog

VerilogBoy reconstructs a Game Boy-compatible console as Verilog RTL for the Pano Logic G1 FPGA device. Its modules implement the SM83 CPU, pixel processing, audio, DMA, and timers, while CPU notes and test results document the behavior used to guide the implementation.

Targets: Game
Category: Independent reconstruction cases
Relationship: Independent reconstruction project
Sources reviewed: 2026-11-06
Evidence class: C1 partial scope or analysis entry

Stars: 552
Last commit: 2022-12-10
Language: Verilog

GitHub data as of 2026-11-10

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Evidence

Demo screenshot from the project's public documentation

Observed: Download and demo observed; the case covers part of the target software.
Scope: Partial
Checked: 2026-11-09

How evidence classes are assigned

Requirements & limits

Prerequisites: A Pano Logic G1 device for the supported hardware target.
Limits: The project is still being refactored; its PPU differs from the original pipeline and accuracy improvements remain planned.
License: Open Hardware Description License 1.0.

Cite

BibTeX

@misc{verilogboy-game-boy-case,
  title = {{VerilogBoy: reconstructing Game Boy hardware in Verilog}},
  howpublished = {\url{https://github.com/zephray/VerilogBoy}},
  url = {https://github.com/zephray/VerilogBoy},
  urldate = {2026-11-06},
  note = {Awesome REA entry: \url{https://awesomerea.org/resources/verilogboy-game-boy-case/}}
}

Plain text

VerilogBoy: reconstructing Game Boy hardware in Verilog. https://github.com/zephray/VerilogBoy (accessed 2026-11-06). Awesome REA entry: https://awesomerea.org/resources/verilogboy-game-boy-case/

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About this entry

The description was reviewed against primary sources.

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Primary sources

README.md GitHub · zephray/VerilogBoy · Revision ba25604
doc/cpu.md GitHub · zephray/VerilogBoy · Revision ba25604