# Cavium SNIC10E: reconstructing a PCIe shared-memory NIC datapath

> The Cavium SNIC10E project reconstructs a PCIe BAR2 shared-memory datapath for the CN6640-SNIC10E card. Host and card drivers exchange packets through per-port rings, with PIO transmit and DPI DMA receive, while boot tooling loads OpenWrt into card RAM. The author reports bidirectional traffic on two 10 GbE ports and documents unstable simultaneous load.

- Type: Case study
- Targets: Protocol
- Category: Independent reconstruction cases
- Relationship: Independent reconstruction project
- Sources reviewed: 2026-11-07
- Added to the catalog: 2026-11-09
- Original resource: <https://github.com/nicologiuliani6/cavium-cn6640-snic10e-octeon-ii-nic>
- Primary source: <https://github.com/nicologiuliani6/cavium-cn6640-snic10e-octeon-ii-nic/blob/142e01983aa8e36b9d0aad37f6b630de6067cf1e/README.md>
- Catalog page: <https://awesomerea.org/resources/cavium-snic10e-datapath-case/>
- Record JSON: <https://awesomerea.org/resources/cavium-snic10e-datapath-case/record.json>
- Chinese version: [简体中文](https://awesomerea.org/zh/resources/cavium-snic10e-datapath-case/index.md)

## Requirements & limits

- **Prerequisites:** Cavium CN6640-SNIC10E card; Linux or Windows 10/11 x64 for the implemented host drivers.
- **Prerequisites:** Initial host boot provisioning needs an FT232 serial adapter and a confirmed u-boot environment write; Secure Boot must be off.
- **Limits:** Sustained simultaneous dual-port traffic can wedge the card, requiring a host reboot.
- **License:** GPL-2.0 License.

## Primary sources

1. <https://github.com/nicologiuliani6/cavium-cn6640-snic10e-octeon-ii-nic/blob/142e01983aa8e36b9d0aad37f6b630de6067cf1e/README.md>
2. <https://github.com/nicologiuliani6/cavium-cn6640-snic10e-octeon-ii-nic/blob/142e01983aa8e36b9d0aad37f6b630de6067cf1e/docs/ARCHITECTURE.md>

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## About this entry

The description was reviewed against primary sources.
Original editorial content: MIT. Linked projects, papers and assets retain their own rights and licenses.