Tool
Bus Pirate
Bus Pirate firmware turns v3 and v4 boards into terminal-controlled tools for investigating electronic buses. It provides SPI and I2C traffic sniffers, a low-speed logic analyzer and scriptable bitbang, 1-Wire, I2C, SPI and UART modes.
- Targets
- Protocol
- Category
- Protocol analysis tools
- Relationship
- Foundation tool
- Sources reviewed
- Stars
- 696
- Last commit
- 2026-10-26
- Language
- C
GitHub data as of 2026-11-09
Requirements & limits
- Prerequisites: Bus Pirate v3.x or v4.x hardware.
- Scope: Logic analyzer capture is specified at 10 Hz to 1 MHz.
- License: Code from Dangerous Prototypes is released under CC0; some included files have other licenses.
Cite
BibTeX
@misc{bus-pirate-v3-v4,
title = {{Bus Pirate}},
howpublished = {\url{https://github.com/ElderlyPirate/Bus_Pirate}},
url = {https://github.com/ElderlyPirate/Bus_Pirate},
urldate = {2026-11-06},
note = {Awesome REA entry: \url{https://awesomerea.org/resources/bus-pirate-v3-v4/}}
}Plain text
Bus Pirate. https://github.com/ElderlyPirate/Bus_Pirate (accessed 2026-11-06). Awesome REA entry: https://awesomerea.org/resources/bus-pirate-v3-v4/
Useful? Star Awesome REA on GitHub2.4k
About this entry
The description was reviewed against primary sources.
Primary sources
- README.md GitHub · ElderlyPirate/Bus_Pirate · Revision 44574ce
- Documentation/bitbang.md GitHub · ElderlyPirate/Bus_Pirate · Revision 44574ce
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